PCB & hardware design
Hardware architecture, component selection, schematic design and PCB layout, followed by board integration, bring-up and validation.
About LEVCOM
System-level thinking.
Hands-on engineering.
LEVCOM designs communication and AI systems across hardware, software and modeling, combining PCB design, CPU-based embedded development, C/C++ software, FPGA engineering and MATLAB/Simulink simulation.
Engineering background
CTO Jake Choi
System design / Embedded software / FPGA & SoC engineering
Around two decades of experience across digital design, FPGA systems, communications and semiconductor engineering.
Jake’s background spans Amazon, Jariet Technologies, NEWRACOM, Samsung Electronics and ETRI. His work connects microarchitecture and RTL implementation with verification, timing closure, embedded software and laboratory validation.
Experience includes satellite digital beamforming, RF data conversion, wireless PHY platforms, camera SoCs and memory test systems, with hands-on work on both Xilinx and Altera platforms.
Technical expertise
Modeling & system design
MATLAB and Simulink modeling for communication, signal-processing and AI systems. Floating-point and fixed-point simulation connects algorithm development with software and hardware implementation.
Embedded CPUs & software
CPU-based system design, C/C++ firmware and applications, Linux integration and Python automation. Development-board systems, including Raspberry Pi, connect software with sensors, peripherals and custom hardware.
Architecture & RTL
Verilog, SystemVerilog and VHDL; pipelined and parallel datapaths; ARM Cortex-A72/A53/A9 systems; AXI interconnects; ASIC-to-FPGA conversion.
Interfaces & memory
JESD204C, 100GbE, Interlaken, Aurora and PCIe; high-speed ADC/DAC integration; DDR4/HBM memory systems and bandwidth optimization.
Verification & implementation
UVM, self-checking testbenches, DPI and co-simulation; CDC, lint and formal analysis; synthesis, static timing analysis, floorplanning and timing closure.
Bring-up & signal processing
First-power-on debug and system qualification; Vivado ILA and SignalTap; Python automation, C/C++, PetaLinux and MATLAB/Simulink; filtering, synchronization and interpolation/decimation.
Patents & research
Hardware architectures & synchronization
U.S. Patent US 12,591,632 B1: “Automated hardware design using recursion in non-power-of-two FFT algorithms.”
Patent application work on pattern synthesis and semiconductor test systems.
DVB-S2 frame synchronization and synchronizer architecture research published in 2007–2009, including IEEE SoC Conference and IEEE ISCAS.