← About LEVCOM

Engineering experience.
Real hardware challenges.

Selected projects from our lead engineer’s professional experience, including work before LEVCOM. These examples describe individual engineering contributions, with customer identities omitted.

Satellite Digital Beamforming Platform

Challenge
Integrate high-throughput FPGA subsystems for a Ka-band satellite communications platform.
Engineering contribution
FPGA subsystem development and integration, AXI control, scheduling and hardware bring-up.
Technologies
JESD204C · Interlaken · AXI · FPGA bring-up
Result
Integrated the digital beamforming subsystems with control and scheduling logic.

ASIC-to-FPGA Architecture Conversion

Challenge
Adapt an ASIC-oriented 400 MHz pipeline to a 200 MHz FPGA implementation.
Engineering contribution
Restructured the pipeline around wider datapaths and parallel execution.
Technologies
Microarchitecture · Parallel datapaths · FPGA resource optimization
Result
Converted the architecture to operate at the lower FPGA clock frequency.

100G-Class SERDES Verification

Challenge
Verify a 106 Gbps PAM4 SERDES subsystem and support FPGA transceiver integration.
Engineering contribution
Built a SystemVerilog/UVM verification environment and supported transceiver integration.
Technologies
SystemVerilog · UVM · PAM4 · SERDES
Result
Delivered a subsystem verification environment and integration support.

High-Performance Camera SoC

Challenge
Verify a large-scale camera and image-processing SoC for a production imaging platform.
Engineering contribution
Contributed to SoC verification across the camera and image-processing design.
Technologies
SoC verification · Camera systems · Image processing
Result
Supported verification of a SoC used in a production imaging platform.

FPGA-Controlled Mixed-Signal Interface

Challenge
Connect FPGA control, embedded software and hardware diagnostics for a high-speed mixed-signal device.
Engineering contribution
Developed FPGA control logic, register architecture, embedded drivers and Python bring-up tools.
Technologies
FPGA control · Register interfaces · Embedded drivers · Python
Result
Delivered the control and diagnostic components for hardware bring-up.

DDR & mDDR Memory Test Systems

Challenge
Evaluate DDR and mobile DDR (mDDR) memory in board-mounted configurations representative of system operation.
Engineering contribution
Developed memory tester systems at Samsung Electronics and performed board-mounted DDR and mDDR testing, connecting test-system design with hardware validation.
Technologies
DDR · mDDR · Memory test systems · Board-mounted testing
Result
Built practical experience in memory test-system development and validation under board-mounted operating conditions.

Wafer EDS & Package-Level Probe Testing

Challenge
Test memory devices through probe-based access at wafer EDS and package stages.
Engineering contribution
Worked on wafer-level EDS (Electrical Die Sorting) and package-level probe testing at Samsung Electronics, including memory test methods and probe-based electrical evaluation.
Technologies
Wafer EDS · Package testing · Probing · Memory electrical characterization
Result
Gained hands-on test experience across wafer, package and system-level memory evaluation.

Have a similar
engineering challenge?

Discuss your project →